194th  Top computing and IT abbreviations 
An analogtodigital converter (abbreviated ADC, A/D or A to D) is a device which converts continuous signals to discrete digital numbers. The reverse operation is performed by a digitaltoanalog converter (DAC).
Typically, an ADC is an electronic device that converts an input analog voltage (or current) to a digital number proportional to the magnitude of the voltage or current. However, some nonelectronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes, such as binary, Gray code or two's complement binary.
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The resolution of the converter indicates the number of discrete values it can produce over the range of analog values. The values are usually stored electronically in binary form, so the resolution is usually expressed in bits. In consequence, the number of discrete values available, or "levels", is usually a power of two. For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 different levels, since 2^{8} = 256. The values can represent the ranges from 0 to 255 (i.e. unsigned integer) or from 128 to 127 (i.e. signed integer), depending on the application.
Resolution can also be defined electrically, and expressed in volts. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of discrete intervals as in the formula:
Where:
Some examples may help:
In practice, the smallest output code ("0" in an unsigned system) represents a voltage range which is 0.5Q, that is, half the ADC voltage resolution (Q), as does the largest output code. The other N − 2 codes are all equal in width and represent the ADC voltage resolution (Q) calculated above. Doing this centers the code on an input voltage that represents the M th division of the input voltage range. For example, in Example 3, with the 3bit ADC spanning a 7 V range, each of the N divisions would represent 1 V, except the 1st ("0" code) and the last ("7" code) which are 0.5 V wide. Doing this the "1" code spans a voltage range from 0.5 to 1.5 V, the "2" code spans a voltage range from 1.5 to 2.5 V, etc. Thus, if the input signal is at 3/8ths of the fullscale voltage, then the ADC outputs the "3" code, and will do so as long as the voltage stays within the range of 2.5/8ths and 3.5/8ths. This practice is called "midtread" operation. This type of ADC can be modeled mathematically as:
The exception to this convention seems to be the Microchip PIC processor, where all M steps are equal width. This practice is called "MidRise with Offset" operation.
In practice, the useful resolution of a converter is limited by the best signaltonoise ratio that can be achieved for a digitized signal. An ADC can resolve a signal to only a certain number of bits of resolution, called the effective number of bits (ENOB). One effective bit of resolution changes the signaltonoise ratio of the digitized signal by 6 dB, if the resolution is limited by the ADC. If a preamplifier has been used prior to A/D conversion, the noise introduced by the amplifier can be an important contributing factor towards the overall SNR.
Most ADCs are of a type known as linear^{[1]} The term linear as used here means that the range of the input values that map to each output value has a linear relationship with the output value, i.e., that the output value k is used for the range of input values from
to
where m and b are constants. Here b is typically 0 or −0.5. When b = 0, the ADC is referred to as midrise, and when b = −0.5 it is referred to as midtread.
If the probability density function of a signal being digitized is uniform, then the signaltonoise ratio relative to the quantization noise is the best possible. Because this is often not the case, it is usual to pass the signal through its cumulative distribution function (CDF) before the quantization. This is good because the regions that are more important get quantized with a better resolution. In the dequantization process, the inverse CDF is needed.
This is the same principle behind the companders used in some taperecorders and other communication systems, and is related to entropy maximization.
For example, a voice signal has a Laplacian distribution. This means that the region around the lowest levels, near 0, carries more information than the regions with higher amplitudes. Because of this, logarithmic ADCs are very common in voice communication systems to increase the dynamic range of the representable values while retaining finegranular fidelity in the lowamplitude region.
An eightbit Alaw or the μlaw logarithmic ADC covers the wide dynamic range and has a high resolution in the critical lowamplitude region, that would otherwise require a 12bit linear ADC.
An ADC has several sources of errors. Quantization error and (assuming the ADC is intended to be linear) nonlinearity is intrinsic to any analogtodigital conversion. There is also a socalled aperture error which is due to a clock jitter and is revealed when digitizing a timevariant signal (not a constant value).
These errors are measured in a unit called the LSB, which is an abbreviation for least significant bit. In the above example of an eightbit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.
Quantization error is due to the finite resolution of the ADC, and is an unavoidable imperfection in all types of ADC. The magnitude of the quantization error at the sampling instant is between zero and half of one LSB.
In the general case, the original signal is much larger than one LSB. When this happens, the quantization error is not correlated with the signal, and has a uniform distribution. Its RMS value is the standard deviation of this distribution, given by . In the eightbit ADC example, this represents 0.113% of the full signal range.
At lower levels the quantizing error becomes dependent of the input signal, resulting in distortion. This distortion is created after the antialiasing filter, and if these distortions are above 1/2 the sample rate they will alias back into the audio band. In order to make the quantizing error independent of the input signal, noise with an amplitude of 1 quantization step is added to the signal. This slightly reduces signal to noise ratio, but completely eliminates the distortion. It is known as dither.
All ADCs suffer from nonlinearity errors caused by their physical imperfections, causing their output to deviate from a linear function (or some other function, in the case of a deliberately nonlinear ADC) of their input. These errors can sometimes be mitigated by calibration, or prevented by testing.
Important parameters for linearity are integral nonlinearity (INL) and differential nonlinearity (DNL). These nonlinearities reduce the dynamic range of the signals that can be digitized by the ADC, also reducing the effective resolution of the ADC.
Imagine that we are digitizing a sine wave x(t) = Asin(2πf_{0}t). Provided that the actual sampling time uncertainty due to the clock jitter is Δt, the error caused by this phenomenon can be estimated as .
The error is zero for DC, small at low frequencies, but significant when high frequencies have high amplitudes. This effect can be ignored if it is drowned out by the quantizing error. Jitter requirements can be calculated using the following formula: , where q is a number of ADC bits.
ADC resolution in bit 
input frequency  

1 Hz  44.1 kHz  192 kHz  1 MHz  10 MHz  100 MHz  1 GHz  
8  1243 µs  28.2 ns  6.48 ns  1.24 ns  124 ps  12.4 ps  1.24 ps 
10  311 µs  7.05 ns  1.62 ns  311 ps  31.1 ps  3.11 ps  0.31 ps 
12  77.7 µs  1.76 ns  405 ps  77.7 ps  7.77 ps  0.78 ps  0.08 ps 
14  19.4 µs  441 ps  101 ps  19.4 ps  1.94 ps  0.19 ps  0.02 ps 
16  4.86 µs  110 ps  25.3 ps  4.86 ps  0.49 ps  0.05 ps  – 
18  1.21 µs  27.5 ps  6.32 ps  1.21 ps  0.12 ps  –  – 
20  304 ns  6.88 ps  1.58 ps  0.16 ps  –  –  – 
24  19.0 ns  0.43 ps  0.10 ps  –  –  –  – 
32  74.1 ps  –  –  –  –  –  – 
This table shows, for example, that it is not worth using a precise 24bit ADC for sound recording if there is not an ultra low jitter clock. One should consider taking this phenomenon into account before choosing an ADC.
Clock jitter is caused by phase noise.^{[2]}^{[3]} The resolution of ADCs with a digitization bandwidth between 1 MHz and 1 GHz is limited by jitter.^{[4]}
When sampling audio signals at 44.1 kHz, the antialiasing filter should have eliminated all frequencies above 22 kHz. The input frequency (in this case, 22 kHz), not the ADC clock frequency, is the determining factor with respect to jitter performance.^{[5]}
The analog signal is continuous in time and it is necessary to convert this to a flow of digital values. It is therefore required to define the rate at which new digital values are sampled from the analog signal. The rate of new values is called the sampling rate or sampling frequency of the converter.
A continuously varying bandlimited signal can be sampled (that is, the signal values at intervals of time T, the sampling time, are measured and stored) and then the original signal can be exactly reproduced from the discretetime values by an interpolation formula. The accuracy is limited by quantization error. However, this faithful reproduction is only possible if the sampling rate is higher than twice the highest frequency of the signal. This is essentially what is embodied in the ShannonNyquist sampling theorem.
Since a practical ADC cannot make an instantaneous conversion, the input value must necessarily be held constant during the time that the converter performs a conversion (called the conversion time). An input circuit called a sample and hold performs this task—in most cases by using a capacitor to store the analog voltage at the input, and using an electronic switch or gate to disconnect the capacitor from the input. Many ADC integrated circuits include the sample and hold subsystem internally.
All ADCs work by sampling their input at discrete intervals of time. Their output is therefore an incomplete picture of the behaviour of the input. There is no way of knowing, by looking at the output, what the input was doing between one sampling instant and the next. If the input is known to be changing slowly compared to the sampling rate, then it can be assumed that the value of the signal between two sample instants was somewhere between the two sampled values. If, however, the input signal is changing rapidly compared to the sample rate, then this assumption is not valid.
If the digital values produced by the ADC are, at some later stage in the system, converted back to analog values by a digital to analog converter or DAC, it is desirable that the output of the DAC be a faithful representation of the original signal. If the input signal is changing much faster than the sample rate, then this will not be the case, and spurious signals called aliases will be produced at the output of the DAC. The frequency of the aliased signal is the difference between the signal frequency and the sampling rate. For example, a 2 kHz sine wave being sampled at 1.5 kHz would be reconstructed as a 500 Hz sine wave. This problem is called aliasing.
To avoid aliasing, the input to an ADC must be lowpass filtered to remove frequencies above half the sampling rate. This filter is called an antialiasing filter, and is essential for a practical ADC system that is applied to analog signals with higher frequency content.
Although aliasing in most systems is unwanted, it should also be noted that it can be exploited to provide simultaneous downmixing of a bandlimited high frequency signal (see undersampling and frequency mixer).
In A to D converters, performance can usually be improved using dither. This is a very small amount of random noise (white noise) which is added to the input before conversion. Its amplitude is set to be about half of the least significant bit. Its effect is to cause the state of the LSB to randomly oscillate between 0 and 1 in the presence of very low levels of input, rather than sticking at a fixed value. Rather than the signal simply getting cut off altogether at this low level (which is only being quantized to a resolution of 1 bit), it extends the effective range of signals that the A to D converter can convert, at the expense of a slight increase in noise  effectively the quantization error is diffused across a series of noise values which is far less objectionable than a hard cutoff. The result is an accurate representation of the signal over time. A suitable filter at the output of the system can thus recover this small signal variation.
An audio signal of very low level (with respect to the bit depth of the ADC) sampled without dither sounds extremely distorted and unpleasant. Without dither the low level always yields a '1' from the A to D. With dithering, the true level of the audio is still recorded as a series of values over time, rather than a series of separate bits at one instant in time.
A virtually identical process, also called dither or dithering, is often used when quantizing photographic images to a fewer number of bits per pixel—the image becomes noisier but to the eye looks far more realistic than the quantized image, which otherwise becomes banded. This analogous process may help to visualize the effect of dither on an analogue audio signal that is converted to digital.
Dithering is also used in integrating systems such as electricity meters. Since the values are added together, the dithering produces results that are more exact than the LSB of the analogtodigital converter.
Note that dither can only increase the resolution of a sampler, it cannot improve the linearity, and thus accuracy does not necessarily improve.
Usually, signals are sampled at the minimum rate required, for economy, with the result that the quantization noise introduced is white noise spread over the whole pass band of the converter. If a signal is sampled at a rate much higher than the Nyquist frequency and then digitally filtered to limit it to the signal bandwidth then there are 3 main advantages:
The speed of an ADC varies by type. The Wilkinson ADC is limited by the clock rate which is processable by current digital circuits. Currently, frequencies up to 300 MHz are possible. The conversion time is directly proportional to the number of channels. For a successive approximation ADC, the conversion time scales with the logarithm of the number of channels. Thus for a large number of channels, it is possible that the successive approximation ADC is faster than the Wilkinson. However, the time consuming steps in the Wilkinson are digital, while those in the successive approximation are analog. Since analog is inherently slower than digital, as the number of channels increases, the time required also increases. Thus there are competing processes at work. Flash ADCs are certainly the fastest type of the three. The conversion is basically performed in a single parallel step. For an 8bit unit, conversion takes place in a few tens of nanoseconds.
There is, as expected, somewhat of a trade off between speed and precision. Flash ADCs have drifts and uncertainties associated with the comparator levels, which lead to poor uniformity in channel width. Flash ADCs have a resulting poor linearity. For successive approximation ADCs, poor linearity is also apparent, but less so than for flash ADCs. Here, nonlinearity arises from accumulating errors from the subtraction processes. Wilkinson ADCs are the best of the three. These have the best differential nonlinearity. The other types require channel smoothing in order to achieve the level of the Wilkinson.
Radiation Detection and Measurement, Glenn F. Knoll. 2nd ed. John Wiley & Sons, New York, 1989, p. 664665.
Nuclear Electronics, P. W. Nicholson. John Wiley & Sons, New York, 1974, p. 313315.
The sliding scale or randomizing method can be employed to greatly improve the channel width uniformity and differential linearity of any type of ADC, but especially flash and successive approximation ADCs. Under normal conditions, a pulse of a particular amplitude is always converted to a certain channel number. The problem lies in that channels are not always of uniform width, and the differential linearity decreases proportionally with the divergence from the average width. The sliding scale principle uses an averaging effect to overcome this phenomenon. A random, but known analog voltage is added to the input pulse. It is then converted to digital form, and the equivalent digital version is subtracted, thus restoring it to its original value. The advantage is that the conversion has taken place at a random point. The statistical distribution of the final channel numbers is decided by a weighted average over a region of the range of the ADC. This in turn desensitizes it to the width of any given channel.
Radiation Detection and Measurement, Glenn F. Knoll. 2nd ed. John Wiley & Sons, New York, 1989, p. 665666.
Nuclear Electronics, P. W. Nicholson. John Wiley & Sons, New York, 1974, p. 315316.
These are the most common ways of implementing an electronic ADC:
There can be other ADCs that use a combination of electronics and other technologies:
These are usually integrated circuits.
Most converters sample with 6 to 24 bits of resolution, and produce fewer than 1 megasample per second. Thermal noise generated by passive components such as resistors masks the measurement when higher resolution is desired. For audio applications and in room temperatures, such noise is usually a little less than 1 μV (microvolt) of white noise. If the Most Significant Bit corresponds to a standard 2 volts of output signal, this translates to a noiselimited performance that is less than 20~21 bits, and obviates the need for any dithering. Mega and gigasample per second converters are available, though (Feb 2002). Megasample converters are required in digital video cameras, video capture cards, and TV tuner cards to convert fullspeed analog video to digital video files. Commercial converters usually have ±0.5 to ±1.5 LSB error in their output.
In many cases the most expensive part of an integrated circuit is the pins, because they make the package larger, and each pin has to be connected to the integrated circuit's silicon. To save pins, it's common for slow ADCs to send their data one bit at a time over a serial interface to the computer, with the next bit coming out when a clock signal changes state, say from zero to 5V. This saves quite a few pins on the ADC package, and in many cases, does not make the overall design any more complex. (Even microprocessors which use memorymapped I/O only need a few bits of a port to implement a serial bus to an ADC.)
Commercial ADCs often have several inputs that feed the same converter, usually through an analog multiplexer. Different models of ADC may include sample and hold circuits, instrumentation amplifiers or differential inputs, where the quantity measured is the difference between two voltages.
ADCs are integral to current music reproduction technology. Since much music production is done on computers, when an analog recording is used, an ADC is needed to create the PCM data stream that goes onto a compact disc or digital music file.
The current crop of AD converters utilized in music can sample at rates up to 192 kilohertz. High bandwidth headroom allows the use of cheaper or faster antialiasing filters of less severe filtering slopes. The proponents of oversampling assert that such shallower antialiasing filters produce less deleterious effects on sound quality, exactly because of their gentler slopes. Others prefer entirely filterless AD conversion, arguing that aliasing is less detrimental to sound perception than preconversion brickwall filtering. Considerable literature exists on these matters, but commercial considerations often play a significant role. Most^{[citation needed]} highprofile recording studios record in 24bit/192176.4 kHz PCM or in DSD formats, and then downsample or decimate the signal for RedBook CD production (44.1 kHz or at 48 kHz for commonly used for radio/TV broadcast applications).
AD converters are used virtually everywhere where an analog signal has to be processed, stored, or transported in digital form. Fast video ADCs are used, for example, in TV tuner cards. Slow onchip 8, 10, 12, or 16 bit ADCs are common in microcontrollers. Very fast ADCs are needed in digital oscilloscopes, and are crucial for new applications like software defined radio.
