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RAM parity determines whether a random access memory unit stores a parity bit for error detection purposes. Non-parity RAM does not include a parity bit, and parity RAM does. Parity RAM requires one additional bit to be stored with each byte of information, requiring memory modules to store 9, rather than 8, bits for every byte.

The purpose of parity RAM is to detect when a memory error (corrupt bit or bits) has occurred. Undetected memory errors can have varying results; from simply annoying to catastrophic. In the case of the home PC where data integrity is often perceived to be of little importance, non-parity memory is an affordable option. However, if any sort of data integrity is required, parity memory would be the minimum level of protection. Further levels of protection such as detection and correction codes may also be warranted in the case of an application with a requirement for high availability.

Logic parity RAM, also known as fake parity RAM, is non-parity RAM that can be used in computers that require parity RAM. Logic parity RAM recalculates the parity bit each time a byte is read from the memory, instead of storing the parity bit when the memory is written to. Therefore logic parity RAM has no error detection capability. It is a means of using cheaper 8-bit RAM in a system designed to use only 9-bit parity RAM.

RAM with ECC or Error Correction Code can detect and correct errors. As with parity RAM, additional information needs to be stored and more processing needs to be done, making ECC RAM more expensive and a little slower than non-parity and parity RAM. This type of ECC memory is especially useful for any application where uptime is a concern. Failing bits in a memory word are detected and corrected on the fly with no impact to the application. The occurrence of the error is typically logged by the operating system for analysis by a technical resource. In the case where the error is persistent, server downtime can be scheduled to replace the failing memory unit. This mechanism of detection and correction is known as EEC or Extended Error Correction.

Early PCs usually required parity RAM, and parity-checking could not be disabled. A parity error typically caused the machine to halt, with loss of unsaved data; this is a better option than saving corrupt data.

Most more recent machines do not support parity or ECC, with consequent risk of data corruption; this has become acceptable as a consequence of the increased reliability of memory. Many of those that support parity or ECC allow checking to be enabled or disabled in the BIOS, permitting cheaper non-parity RAM to be used. If parity RAM is used the chipset will usually use it to implement error correction, rather than halting the machine on a single-bit parity error.

As of 2008 ECC RAM is universally used where error-checking is required; simple parity RAM is no longer used.




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